Huawei’s announcement this week that its chips will achieve 1.4-nanometre-equivalent transistor density by 2031 is less a manufacturing claim than a philosophical one — and that distinction matters enormously for anyone pricing China technology risk.
At the 2026 IEEE International Symposium on Circuits and Systems in Shanghai on May 25, He Tingbo of Huawei’s HiSilicon division delivered a keynote introducing the Tau (τ) Scaling Law, a new principle that proposes replacing geometric scaling — shrinking transistors — with time (τ) scaling as the guiding framework for both semiconductors and electronic systems.
Huawei did not provide independent performance data to support the 2031 target, but the claim carries strategic weight: 1.4 nm is expected to be close to the global frontier for advanced chipmaking around the end of the decade.
The gap to close is not trivial. China’s most advanced proven chipmaking capability is widely assessed at around 7 nanometres; the announced target sits at 1.4 nm. TSMC, the world’s largest producer of the most advanced chips, currently uses a 2-nm manufacturing technology and plans to introduce a 1.4-nm process for mass production in 2028. If Huawei achieves its 1.4-nm-equivalent target by 2031, China would be approximately three years behind the global frontier — a dramatically compressed gap from the current five-to-seven-year deficit.
The mechanism Huawei is proposing is architectural, not lithographic. The Tau Scaling Law is a “temporal scaling framework” that prioritises signal speed over transistor size, optimising how rapidly data moves across the system. To execute this on a commercial level, Huawei developed LogicFolding — an architecture that physically folds and stacks logic circuits onto a dual-layer framework. Rather than shrinking transistors, Huawei is shifting focus toward shortening the “time constant” inside chips to improve overall computing performance and efficiency, reducing signal delays and shortening communication paths, and thereby extracting more performance from existing manufacturing technologies.
He Hui, director of semiconductor research at Omdia, offered a calibrated endorsement: “What Huawei is proposing is a shift from traditional node-driven scaling to system-level efficiency scaling. Rather than depending solely on smaller transistors, the company is focusing on shortening interconnect, lowering latency and improving data movement inside the chip, which is a credible way to extract more performance when leading-edge lithography is constrained.”
He Tingbo revealed Huawei has spent the last six years quietly refining the methodology, designing and mass-producing 381 chips based on the principle; the LogicFolding architecture will make its commercial debut in flagship Kirin smartphone processors this autumn.
By shortening internal wiring to reduce signal delay, Huawei says it has achieved a 55% increase in transistor density and a 41% improvement in power efficiency, claiming this allows it to build processors that match the performance of Western chips without expensive EUV machines. Those claims, however, carry the caveat that they originate exclusively from Huawei’s own presentation and have not been independently verified.
The regulatory context sharpens the stakes. In May 2025, the U.S. Department of Commerce Bureau of Industry and Security issued new guidance amounting to prohibitions on U.S. and non-U.S. persons using, selling, transferring, financing, or servicing Huawei’s Ascend 910B, 910C, and 910D chips, as well as other comparable chips from Chinese companies. The Commerce Department stated that the use of Huawei’s Ascend AI chips “anywhere in the world” violates government export controls. The formal rationale is that these chips were likely produced using U.S.-origin software or semiconductor manufacturing equipment obtained without authorisation.
The Trump administration is expected to replace the rescinded AI Diffusion Rule with a more country-specific approach, which could involve individual negotiations with countries on chip export rules and caps based on national security concerns as well as broader foreign policy and trade considerations. That shift creates asymmetric risk for Gulf sovereign wealth funds and GCC data centre investors who had been evaluating Huawei’s Ascend stack as an alternative AI infrastructure layer: the regulatory ground beneath third-country procurement has not stabilised.
The current hardware reality is more modest than the 2031 projection implies. DeepSeek researchers found that the Ascend 910C delivers approximately 60% of Nvidia’s H100 inference performance; while not a performance champion, it can succeed in reducing China’s reliance on Nvidia GPUs. DeepSeek’s Yuchen Jin noted that “the biggest challenge for Chinese chips is the stability of long-cycle training,” a challenge arising from the deep integration of Nvidia’s hardware and software ecosystem, with CUDA having been developed over two decades; sustained training workloads will require Huawei to further enhance its hardware and software stack.
Huawei’s system-level workaround is already partially operational. SemiAnalysis revealed in April 2025 that Huawei’s CloudMatrix 384, which stitches together 384 Ascend 910C chips in a full-mesh network, can outperform Nvidia’s GB200 NVL72 in certain metrics — the logic being that even though each Ascend chip delivers roughly one-third the performance of Nvidia’s Blackwell GPUs, the scale more than compensates. This is precisely the systems-integration logic that the Tau Scaling Law formalises: compete at the rack and cluster level rather than at the transistor level.
The second-order implication most capital allocators will miss is the software wedge. DeepSeek’s latest model included native support for China-native chips and Huawei’s CANN platform, which is also open source, accelerating its adoption in China and potentially elsewhere. If the most capable Chinese AI lab demonstrates that competitive models can be built without Nvidia, the argument for maintaining export controls weakens alongside the argument for buying Nvidia. A China-native software stack that lowers the switching cost from CUDA to CANN is as consequential as the underlying silicon — and harder to sanction.
On the supply chain side, three Chinese chip equipment manufacturers ranked among the world’s top 20 by sales volume for the first time in 2025, according to Japanese research firm Global Net. China has moved to mandate that chipmakers use at least 50% domestically produced equipment when adding new manufacturing capacity, a policy already reshaping procurement decisions across the country’s fab build-out. The ecosystem is hardening from the bottom up, irrespective of whether the Tau Scaling Law delivers on its 2031 promise.
The Political Times view: Huawei’s Tau announcement should be read as a viable architectural hedge, not a manufacturing breakthrough. The 1.4-nm-equivalent claim is unverified and carries a five-year conditional — Huawei’s performance record on public roadmap targets is mixed. But the LogicFolding and systems-level strategy is already generating commercial chips and a rack-scale system that, in cluster configuration, challenges Nvidia’s Blackwell in select workloads. The deeper risk for investors in Nvidia, ASML, and Western semiconductor equipment is not that Huawei beats TSMC at the transistor level — it probably will not, by 2031 or otherwise — but that it renders the transistor race partially irrelevant for a large and captive market. For private equity and growth equity investors evaluating Chinese AI infrastructure plays, the Ascend-CANN stack is now the credible domestic alternative to Nvidia; positions in companies dependent on that stack should be evaluated against the expanding scope of U.S. secondary enforcement, which in May 2025 moved explicitly to extraterritorial prohibition. The probability that third-country cloud operators face BIS enforcement action for Ascend deployment is, on current trajectory, more likely than not to rise before the Trump administration settles on a replacement AI diffusion framework.